Soma Wable - Study Abroad profile

Select Goal &

City

Select Goal

Work Experience

0.2 yr

GRE

331

Sort By:

all

admitted

admitted

Applied Date: 07 Oct 2020

Decision: 20 Apr 2021

admitted

Applied Date: 01 Nov 2020

Decision: 12 Mar 2021

Electronics and Communication Engineering

Delhi Technological University

8.21

Aggregate score and pattern

Verification Engineer

Internship

Cadence Design Systems

May 2019 to July 2019 (2 months)

Verilog HDL

System Verilog

Digital Circuit Design

Vlsi Design

VLSI

Xilinx Vivado

Adobe Premiere Pro

SUBSCRIBE TO OUR NEWS LETTER

COLLEGE NOTIFICATIONS

EXAM NOTIFICATIONS

NEWS UPDATES

Download the Collegedunia app on