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2.4 yrs
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Undergrad Details
Instrumentation Technology
Ymca University Of Science And Technology
7.7
Aggregate score and pattern
Work Experience(1)
Design Engineer
Full time
Truechip Solutions Pvt Ltd
July 2017 to Dec 2019 (2 years, 5 months)
Skills(4)
Verilog
System Verilog
UVM
Drawing
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